WebChithra. Assistant Professor, Dept. of Electrical Engineering, IIT Kanpur. Verified email at iitk.ac.in. mixed signal circuits delay-locked loop time-to-digital converter digital-to-time … WebDr Chithra - Assistant Professor Indian Institute of Technology Kanpur Expertise Electrical and Electronic Engineering Analog and digital IC design, time-to-digital …

IEEE-EDS Workshop on Devices and Circuits - home.iitk.ac.in

WebChithra (From: BITS Pilani Goa; To: IIT Kanpur) PhD thesis: A Multi-Hit Multi-Channel Time-to-Digital Converter for the India-based Neutrino Observatory Debasish Behera (From: IIT Madras, Marvell; To: Aura Semiconductor, Bangalore) MS thesis: Memoryless Analog-to-Digital Conversion Using ΔΣ Modulator and Zero-ISI Filter Deepa Devendran WebChithra Research Interests: Analog and mixed-signal VLSI design, digital VLSI design, frequency and phase synthesis, time-to-digital converters Office location: WL-211 Phone: … rduaa badging office

IEEE-EDS Workshop on Devices and Circuits - IIT Kanpur

WebAssociate Dean; About present Associate Dean of Faculty Affairs Office; Contact Information WebIIT Kanpur WebINDIAN INSTITUTE OF TECHNOLOGY KANPUR Updated in November, 2024 . 2 GUIDELINES FOR THESIS PREPARATION 1. Introduction 1.1 Purpose This document, herein after referred to as the Thesis Guide, lists the general and specific requirements governing thesis preparation including guidelines for structuring the contents. For rdu who